Comparison of scalable Montgomery modular multiplication implementations embedded in reconfigurable hardware

Similar Items

• An FPGA implementation of a Montgomery multiplier over GF(2M)
  by: Mentens, Nele, et al.
• Hardware infrastructure of remote laboratory for experimental testing of FPGA based complex reconfigurable systems
  by: Drutarovský, Miloš, 1965-, et al.
• Built-in self-test quality assessment using hardware fault emulation in FPGAs
  by: Parreira, Abílio Mendes, et al.
• Custom FPGA cryptographic blocks for reconfigurable embedded Nios processor
  by: Drutarovský, Miloš, 1965-, et al.
• Implementation of Scalable Montgomery Multiplication Coprocessor in Altera Reconfigurable Hardware
  by: Drutarovský, Miloš, 1965-, et al.