Portal, J. M., Figueras, J., Renovell, M., & Zorian, Y. MINIMAL SETS OF TEST CONFIGURATIONS FOR THE LOGIC CELLS OF XILINX, ALTERA AND LUCENT FPGAs.
Chicago Style (17th ed.) CitationPortal, J. M., J. Figueras, M. Renovell, and Y. Zorian. MINIMAL SETS OF TEST CONFIGURATIONS FOR THE LOGIC CELLS OF XILINX, ALTERA AND LUCENT FPGAs.
MLA (9th ed.) CitationPortal, J. M., et al. MINIMAL SETS OF TEST CONFIGURATIONS FOR THE LOGIC CELLS OF XILINX, ALTERA AND LUCENT FPGAs.
Warning: These citations may not always be 100% accurate.


